;buildInfoPackage: chisel3, version: 3.1-SNAPSHOT, scalaVersion: 2.11.11, sbtVersion: 0.13.15, builtAtString: 2017-06-08 17:59:39.314, builtAtMillis: 1496944779314
circuit DecoupledAdderTests : 
  module SlowDecoupledAdder : 
    input clock : Clock
    input reset : UInt<1>
    output io : {flip in : {flip ready : UInt<1>, valid : UInt<1>, bits : {a : UInt<16>, b : UInt<16>}}, out : {flip ready : UInt<1>, valid : UInt<1>, bits : {c : UInt<16>}}}
    
    clock is invalid
    reset is invalid
    io is invalid
    reg busy : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[DecoupledAdder.scala 29:24]
    reg a_reg : UInt<16>, clock with : (reset => (reset, UInt<16>("h00"))) @[DecoupledAdder.scala 30:24]
    reg b_reg : UInt<16>, clock with : (reset => (reset, UInt<16>("h00"))) @[DecoupledAdder.scala 31:24]
    reg wait_counter : UInt<16>, clock with : (reset => (reset, UInt<16>("h00"))) @[DecoupledAdder.scala 32:29]
    node _T_26 = eq(busy, UInt<1>("h00")) @[DecoupledAdder.scala 34:18]
    io.in.ready <= _T_26 @[DecoupledAdder.scala 34:15]
    node _T_28 = eq(reset, UInt<1>("h00")) @[DecoupledAdder.scala 36:9]
    when _T_28 : @[DecoupledAdder.scala 36:9]
      printf(clock, UInt<1>(1), "in: ready %d   valid %d   a %d b %d   -- out:  ready %d  valid %d  c %d", io.in.ready, io.in.valid, io.in.bits.a, io.in.bits.b, io.out.ready, io.out.valid, io.out.bits.c) @[DecoupledAdder.scala 36:9]
      skip @[DecoupledAdder.scala 36:9]
    node _T_30 = eq(busy, UInt<1>("h00")) @[DecoupledAdder.scala 40:23]
    node _T_31 = and(io.in.valid, _T_30) @[DecoupledAdder.scala 40:20]
    when _T_31 : @[DecoupledAdder.scala 40:30]
      a_reg <= io.in.bits.a @[DecoupledAdder.scala 41:18]
      b_reg <= io.in.bits.b @[DecoupledAdder.scala 42:18]
      busy <= UInt<1>("h01") @[DecoupledAdder.scala 43:18]
      wait_counter <= UInt<1>("h00") @[DecoupledAdder.scala 44:18]
      skip @[DecoupledAdder.scala 40:30]
    when busy : @[DecoupledAdder.scala 46:14]
      node _T_35 = gt(wait_counter, UInt<4>("h0a")) @[DecoupledAdder.scala 47:23]
      when _T_35 : @[DecoupledAdder.scala 47:45]
        node _T_36 = add(a_reg, b_reg) @[DecoupledAdder.scala 48:30]
        node _T_37 = tail(_T_36, 1) @[DecoupledAdder.scala 48:30]
        io.out.bits.c <= _T_37 @[DecoupledAdder.scala 48:21]
        skip @[DecoupledAdder.scala 47:45]
      node _T_39 = eq(_T_35, UInt<1>("h00")) @[DecoupledAdder.scala 47:45]
      when _T_39 : @[DecoupledAdder.scala 49:17]
        node _T_41 = add(wait_counter, UInt<1>("h01")) @[DecoupledAdder.scala 50:36]
        node _T_42 = tail(_T_41, 1) @[DecoupledAdder.scala 50:36]
        wait_counter <= _T_42 @[DecoupledAdder.scala 50:20]
        skip @[DecoupledAdder.scala 49:17]
      skip @[DecoupledAdder.scala 46:14]
    node _T_43 = add(a_reg, b_reg) @[DecoupledAdder.scala 54:44]
    node _T_44 = tail(_T_43, 1) @[DecoupledAdder.scala 54:44]
    node _T_45 = eq(io.out.bits.c, _T_44) @[DecoupledAdder.scala 54:34]
    node _T_46 = and(_T_45, busy) @[DecoupledAdder.scala 54:54]
    io.out.valid <= _T_46 @[DecoupledAdder.scala 54:16]
    when io.out.valid : @[DecoupledAdder.scala 56:22]
      busy <= UInt<1>("h00") @[DecoupledAdder.scala 57:19]
      skip @[DecoupledAdder.scala 56:22]
    
  module DecoupledAdderTests : 
    input clock : Clock
    input reset : UInt<1>
    output io : {}
    
    clock is invalid
    reset is invalid
    io is invalid
    inst device_under_test of SlowDecoupledAdder @[DecoupledAdder.scala 62:33]
    device_under_test.io is invalid
    device_under_test.clock <= clock
    device_under_test.reset <= reset
    reg _T_4 : UInt<7>, clock with : (reset => (reset, UInt<7>("h00"))) @[OrderedDecoupledHWIOTester.scala 374:30]
    reg _T_7 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[OrderedDecoupledHWIOTester.scala 375:30]
    reg _T_10 : UInt<7>, clock with : (reset => (reset, UInt<7>("h00"))) @[OrderedDecoupledHWIOTester.scala 374:30]
    reg _T_13 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[OrderedDecoupledHWIOTester.scala 375:30]
    node _T_14 = and(_T_7, _T_13) @[OrderedDecoupledHWIOTester.scala 402:42]
    when _T_14 : @[OrderedDecoupledHWIOTester.scala 402:79]
      node _T_16 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 403:13]
      when _T_16 : @[OrderedDecoupledHWIOTester.scala 403:13]
        printf(clock, UInt<1>(1), "All input and output events completed\n") @[OrderedDecoupledHWIOTester.scala 403:13]
        skip @[OrderedDecoupledHWIOTester.scala 403:13]
      node _T_18 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 404:11]
      when _T_18 : @[OrderedDecoupledHWIOTester.scala 404:11]
        stop(clock, UInt<1>(1), 0) @[OrderedDecoupledHWIOTester.scala 404:11]
        skip @[OrderedDecoupledHWIOTester.scala 404:11]
      skip @[OrderedDecoupledHWIOTester.scala 402:79]
    reg _T_21 : UInt<14>, clock with : (reset => (reset, UInt<14>("h00"))) @[OrderedDecoupledHWIOTester.scala 407:21]
    node _T_23 = add(_T_21, UInt<1>("h01")) @[OrderedDecoupledHWIOTester.scala 408:14]
    node _T_24 = tail(_T_23, 1) @[OrderedDecoupledHWIOTester.scala 408:14]
    _T_21 <= _T_24 @[OrderedDecoupledHWIOTester.scala 408:8]
    node _T_26 = gt(_T_21, UInt<14>("h02710")) @[OrderedDecoupledHWIOTester.scala 409:13]
    when _T_26 : @[OrderedDecoupledHWIOTester.scala 409:67]
      node _T_29 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 410:13]
      when _T_29 : @[OrderedDecoupledHWIOTester.scala 410:13]
        printf(clock, UInt<1>(1), "Exceeded maximum allowed %d ticks in OrderedDecoupledHWIOTester, If you think code is correct use:\nDecoupleTester.max_tick_count = <some-higher-value>\nin the OrderedDecoupledHWIOTester subclass\n", UInt<14>("h02710")) @[OrderedDecoupledHWIOTester.scala 410:13]
        skip @[OrderedDecoupledHWIOTester.scala 410:13]
      node _T_31 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 416:11]
      when _T_31 : @[OrderedDecoupledHWIOTester.scala 416:11]
        stop(clock, UInt<1>(1), 0) @[OrderedDecoupledHWIOTester.scala 416:11]
        skip @[OrderedDecoupledHWIOTester.scala 416:11]
      skip @[OrderedDecoupledHWIOTester.scala 409:67]
    wire _T_55 : UInt<1>[21] @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55 is invalid @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[0] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[1] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[2] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[3] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[4] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[5] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[6] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[7] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[8] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[9] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[10] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[11] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[12] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[13] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[14] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[15] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[16] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[17] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[18] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[19] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_55[20] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 225:8]
    reg value : UInt<5>, clock with : (reset => (reset, UInt<5>("h00"))) @[Counter.scala 17:33]
    wire _T_104 : UInt<3>[21] @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104 is invalid @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[0] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[1] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[2] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[3] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[4] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[5] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[6] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[7] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[8] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[9] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[10] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[11] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[12] <= UInt<2>("h03") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[13] <= UInt<2>("h03") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[14] <= UInt<2>("h03") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[15] <= UInt<2>("h03") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[16] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[17] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[18] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[19] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_104[20] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    wire _T_151 : UInt<3>[21] @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151 is invalid @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[0] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[1] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[2] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[3] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[4] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[5] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[6] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[7] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[8] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[9] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[10] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[11] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[12] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[13] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[14] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[15] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[16] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[17] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[18] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[19] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_151[20] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    device_under_test.io.in.bits.a <= _T_104[value] @[OrderedDecoupledHWIOTester.scala 283:14]
    device_under_test.io.in.bits.b <= _T_151[value] @[OrderedDecoupledHWIOTester.scala 283:14]
    node _T_178 = bits(_T_4, 4, 0)
    device_under_test.io.in.valid <= _T_55[_T_178] @[OrderedDecoupledHWIOTester.scala 285:30]
    node _T_179 = and(device_under_test.io.in.valid, device_under_test.io.in.ready) @[OrderedDecoupledHWIOTester.scala 287:35]
    when _T_179 : @[OrderedDecoupledHWIOTester.scala 287:62]
      node _T_181 = eq(value, UInt<5>("h013")) @[Counter.scala 25:24]
      node _T_183 = add(value, UInt<1>("h01")) @[Counter.scala 26:22]
      node _T_184 = tail(_T_183, 1) @[Counter.scala 26:22]
      value <= _T_184 @[Counter.scala 26:13]
      when _T_181 : @[Counter.scala 28:21]
        value <= UInt<1>("h00") @[Counter.scala 28:29]
        skip @[Counter.scala 28:21]
      node _T_187 = eq(_T_7, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 380:12]
      when _T_187 : @[OrderedDecoupledHWIOTester.scala 380:28]
        node _T_189 = eq(_T_4, UInt<5>("h013")) @[OrderedDecoupledHWIOTester.scala 381:22]
        when _T_189 : @[OrderedDecoupledHWIOTester.scala 381:48]
          _T_7 <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 382:23]
          skip @[OrderedDecoupledHWIOTester.scala 381:48]
        node _T_192 = add(_T_4, UInt<1>("h01")) @[OrderedDecoupledHWIOTester.scala 384:28]
        node _T_193 = tail(_T_192, 1) @[OrderedDecoupledHWIOTester.scala 384:28]
        _T_4 <= _T_193 @[OrderedDecoupledHWIOTester.scala 384:17]
        skip @[OrderedDecoupledHWIOTester.scala 380:28]
      skip @[OrderedDecoupledHWIOTester.scala 287:62]
    wire _T_217 : UInt<1>[21] @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217 is invalid @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[0] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[1] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[2] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[3] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[4] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[5] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[6] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[7] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[8] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[9] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[10] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[11] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[12] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[13] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[14] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[15] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[16] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[17] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[18] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[19] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 225:8]
    _T_217[20] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 225:8]
    reg value_1 : UInt<5>, clock with : (reset => (reset, UInt<5>("h00"))) @[Counter.scala 17:33]
    wire _T_266 : UInt<4>[21] @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266 is invalid @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[0] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[1] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[2] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[3] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[4] <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[5] <= UInt<2>("h03") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[6] <= UInt<3>("h05") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[7] <= UInt<3>("h07") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[8] <= UInt<2>("h02") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[9] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[10] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[11] <= UInt<4>("h08") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[12] <= UInt<2>("h03") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[13] <= UInt<3>("h05") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[14] <= UInt<3>("h07") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[15] <= UInt<4>("h09") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[16] <= UInt<3>("h04") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[17] <= UInt<3>("h06") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[18] <= UInt<4>("h08") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[19] <= UInt<4>("h0a") @[OrderedDecoupledHWIOTester.scala 252:18]
    _T_266[20] <= UInt<1>("h00") @[OrderedDecoupledHWIOTester.scala 252:18]
    node _T_291 = bits(_T_10, 4, 0)
    device_under_test.io.out.ready <= _T_217[_T_291] @[OrderedDecoupledHWIOTester.scala 314:30]
    node _T_292 = and(device_under_test.io.out.ready, device_under_test.io.out.valid) @[OrderedDecoupledHWIOTester.scala 316:35]
    when _T_292 : @[OrderedDecoupledHWIOTester.scala 316:62]
      node _T_295 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 318:17]
      when _T_295 : @[OrderedDecoupledHWIOTester.scala 318:17]
        printf(clock, UInt<1>(1), "output test event %d testing out.bits.c = %d, should be %d\n", _T_10, device_under_test.io.out.bits.c, _T_266[value_1]) @[OrderedDecoupledHWIOTester.scala 318:17]
        skip @[OrderedDecoupledHWIOTester.scala 318:17]
      node _T_297 = neq(device_under_test.io.out.bits.c, _T_266[value_1]) @[OrderedDecoupledHWIOTester.scala 321:40]
      when _T_297 : @[OrderedDecoupledHWIOTester.scala 321:103]
        node _T_300 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 322:19]
        when _T_300 : @[OrderedDecoupledHWIOTester.scala 322:19]
          printf(clock, UInt<1>(1), "Error: event %d out.bits.c was %d should be %d\n", _T_10, device_under_test.io.out.bits.c, _T_266[value_1]) @[OrderedDecoupledHWIOTester.scala 322:19]
          skip @[OrderedDecoupledHWIOTester.scala 322:19]
        node _T_302 = or(UInt<1>("h00"), reset) @[OrderedDecoupledHWIOTester.scala 324:19]
        node _T_304 = eq(_T_302, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 324:19]
        when _T_304 : @[OrderedDecoupledHWIOTester.scala 324:19]
          printf(clock, UInt<1>(1), "Assertion failed\n    at OrderedDecoupledHWIOTester.scala:324 assert(false.B)\n") @[OrderedDecoupledHWIOTester.scala 324:19]
          stop(clock, UInt<1>(1), 1) @[OrderedDecoupledHWIOTester.scala 324:19]
          skip @[OrderedDecoupledHWIOTester.scala 324:19]
        node _T_306 = eq(reset, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 325:17]
        when _T_306 : @[OrderedDecoupledHWIOTester.scala 325:17]
          stop(clock, UInt<1>(1), 0) @[OrderedDecoupledHWIOTester.scala 325:17]
          skip @[OrderedDecoupledHWIOTester.scala 325:17]
        skip @[OrderedDecoupledHWIOTester.scala 321:103]
      node _T_308 = eq(value_1, UInt<5>("h013")) @[Counter.scala 25:24]
      node _T_310 = add(value_1, UInt<1>("h01")) @[Counter.scala 26:22]
      node _T_311 = tail(_T_310, 1) @[Counter.scala 26:22]
      value_1 <= _T_311 @[Counter.scala 26:13]
      when _T_308 : @[Counter.scala 28:21]
        value_1 <= UInt<1>("h00") @[Counter.scala 28:29]
        skip @[Counter.scala 28:21]
      node _T_314 = eq(_T_13, UInt<1>("h00")) @[OrderedDecoupledHWIOTester.scala 380:12]
      when _T_314 : @[OrderedDecoupledHWIOTester.scala 380:28]
        node _T_316 = eq(_T_10, UInt<5>("h013")) @[OrderedDecoupledHWIOTester.scala 381:22]
        when _T_316 : @[OrderedDecoupledHWIOTester.scala 381:48]
          _T_13 <= UInt<1>("h01") @[OrderedDecoupledHWIOTester.scala 382:23]
          skip @[OrderedDecoupledHWIOTester.scala 381:48]
        node _T_319 = add(_T_10, UInt<1>("h01")) @[OrderedDecoupledHWIOTester.scala 384:28]
        node _T_320 = tail(_T_319, 1) @[OrderedDecoupledHWIOTester.scala 384:28]
        _T_10 <= _T_320 @[OrderedDecoupledHWIOTester.scala 384:17]
        skip @[OrderedDecoupledHWIOTester.scala 380:28]
      skip @[OrderedDecoupledHWIOTester.scala 316:62]
    
